1. Field of the Invention
The invention relates generally to fuses within microelectronic structures. More particularly, the invention relates to enhanced performance fuses within microelectronic structures.
2. Description of the Related Art
In addition to transistors, resistors, capacitors and diodes, semiconductor circuits also often include fuses. Fuses within semiconductor circuits may be used for several purposes. For example and without limitation, fuses may be used within semiconductor circuits for purposes of introducing or deleting customized circuit elements into a semiconductor circuit. In addition, fuses within semiconductor circuits are alternatively used for purposes of severing a non-operative portion of a semiconductor circuit and replacing that non-operative portion with a redundant semiconductor circuit fabricated upon the same semiconductor substrate. Such redundant semiconductor circuit replacement is typically effected within memory semiconductor circuits, since memory semiconductor circuits often comprise multiple semiconductor circuit portions having an identical design.
While fuses are thus desirable within semiconductor circuit design and fabrication, and provide an essential tool for cost effective and efficient semiconductor circuit design and fabrication, fuses are nonetheless not entirely without problems within semiconductor circuit fabrication. In particular, as semiconductor structure and device dimensions have decreased and semiconductor circuit operating voltages have also decreased, it has become increasingly more difficult to fabricate within semiconductor circuits fuses that are susceptible to comparatively low severing (i.e., programming) currents at typical severing (i.e., programming) voltages of less than about 3 volts.
Various fuse structures for use within semiconductor circuits, and methods for fabrication thereof, are known in the semiconductor fabrication art. Included in particular is a fuse structure and method for fabrication thereof disclosed within Galbi et al., in U.S. Pat. No. 5,420,456. This particular fuse structure is fabricated using a planar fuse material layer designed with an in-plane angular bend that provides for a substantial reduction (i.e., about a 90% reduction) in severance current when severing the fuse material layer within the fuse structure.
Semiconductor structure and device dimensions are certain to continue to decrease as semiconductor technology advances. As a result thereof, desirable are semiconductor structures and devices including fuse structures, as well as methods for fabricating the semiconductor structures and devices including the fuse structures, that provide fuses with enhanced performance.